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As a hardware geek I was thrilled by the announcement of the open-source RISC-V instruction set architecture back in 2015. RISC-V aims to do for hardware what Linux did for the operating system. This has been a dream of the open hardware community for a long time. However, the infrastructure necessary to operationalize this idea was lacking. Simply put, it was economically infeasible for all but the largest organizations to produce small batches of custom processor chips.
The Maturing Landscape of RISC-V
ARM processors have become a household name in tech, and that’s where the RISC-V story starts. Originally, ARM stood for “Acorn RISC Machine”. Acorn computing was an early pioneer in personal computing and in 1987 they release the Acorn Archimedes, the first production RISC processor. What is RISC? It stands for “Reduced instruction set computer”. The basic concept was to reduce the number of instructions needed to get a processor to do work. Fewer instructions, in turn, leads to easier programming and more efficient performance. The list of instructions used by a given processor architecture are defined by its Instruction Set Architecture (ISA). The ARM ISA has 232 instructions total that can be sent to the processor. For comparison, Intel’s x86-64 processor, a CISC “Complex instruction set computer”, has 3,684 instruction variants. Though the additional instructions do allow for better optimization in certain cases, this complexity comes at a cost.
Though Intel is still the largest supplier of data center processors, this is largely a result of their legacy position at the top of the market. The long term trend in data center processors is moving against Intel in the direction of RISC-based processors. This is due to their improved performance in parallel operations, high core counts and power efficiency. RISC processors generally result in higher ROI for data centers as they can generally run more virtual machines per chip.
RISC-V in Today’s Market
As of September 2023, the highest core-count Intel Xeon processor has 56 cores. AMD’s flagship x86-64 based EPYC processor for cloud and data center use comes with 128 cores. While the ARM-based AmpereOne packs 192 cores into a similar sized package with similar clock speeds and power consumption. This is all well and good for RISC-based processing but how does RISC-V change the landscape?
Intel, AMD and ARM are all closed firms. Intel and AMD maintain full control over the design, manufacture and distribution of their processors. ARM is slightly more open in that it principally acts as a licensing firm, allowing companies to develop and manufacture chips based on their intellectual property. Developing processors with ARM comes at the price of licensing fees charged in perpetuity over the life of a given product. This is where RISC-V is different. As an open source ISA, RISC-V gives teams full control over their chip development. Chip designers can modify existing designs to meet emerging use cases without fear of being slapped by another round of licensing fees for small iterative changes. It also allows the deployment of RISC-V based processor cores on FPGAs without running afoul licensing agreements.
The real significance of RISC-V is the freedom to innovate. As the first set of RISC-V based chips began to slowly release over the past few years there were no doubt a few which just reinvented the wheel. However, there are others which broke the mold, like the 432-core Occamy processor developed by the European Space Agency in collaboration with ETH Zurich and the University of Bologna.
Future Prospects of RISC-V
RISC-V makes it much more affordable to create application specific processors. I predict this will have huge long term impacts on IT infrastructure as it removes one of the big bottle necks in hardware production. Currently, a relatively small number of companies design and manufacture the chips that we use. As these companies can only release a small set of new processors each year they tend towards general purpose designs. This comes with a variety of trade offs like, should we optimize a chip for performance or power efficiency? Should we improve clock speed or core-count?
The hope is that RISC-V will allow companies to tailor chip designs to there exact use case. The hope is that this will result in economic savings over time for companies that move to RISC-V. RISC-V also comes with a number of potential additional benefits. Open designs tend to be more secure as they come under more widespread scrutiny. They also present an opportunity to reduce environmental impacts as chips can be better optimized for energy efficiency and their improved maintainability will likely extend the lifespan of chip designs.
Market Growth and Projections
To be clear RISC-V is not yet a mature technology. Though there are products on the market and many more on the horizon the future of RISC-V has yet to be written. Regardless, the level of industry interest has RISC-V poised to become a big player in data centers. According to BCC Research (https://www.bccresearch.com/market-research/semiconductor-manufacturing/global-risc-v-technology-market.html) RISC-V technologies reached a market size of 445.7 million USD in 2021 and is projected to reach 2.7 billion USD by 2027. Though this is still a drop in the bucket compared to the global processor market, which reached 108 billion USD in 2022, it is a remarkable start for a first of its kind open source technology.
